Samsung Is Sending DDR5 Out the Door, Not Because DRAM Is Scarce But HBM Packaging Is

Samsung isn't giving up on DDR5 or SSDs. It's pushing extra module assembly and testing to outside partners so it can hand more of its scarce Cheonan and Onyang packaging space to HBM.

Get the outsourcing right first

Read this as "Samsung is outsourcing DRAM production" and you miss the point.

According to industry reports cited by TrendForce, Samsung is pushing more of its incremental output of commodity memory products, DDR5 modules and SSDs, to outsourced assembly and test (OSAT) partners. The goal is to free up limited back-end packaging space and equipment at its Cheonan and Onyang facilities in South Korea and redirect that capacity toward HBM and other high-complexity packaging work.

This is not about handing off wafer-level DRAM or NAND manufacturing wholesale. Samsung still controls chip design, wafer fabrication, product specifications and quality control. What outside partners are picking up more of is the back end: mounting chips on substrates, assembling them into modules or SSDs, and testing the finished product.

The point isn't giving up production, it's reallocating space. In the AI memory era, packaging line space, equipment and skilled technicians have become as scarce as wafer fab capacity itself.

Why the back end is the bottleneck

HBM isn't finished just by making a lot of DRAM chips. Multiple DRAM dies have to be stacked vertically, connected through structures like through-silicon vias (TSVs), joined with fine-pitch bonding, tested, and then packaged together with an AI accelerator.

That process is far more complex than assembling a standard DDR5 module, and a single yield problem can hit finished-product cost and shipments hard. The difficulty compounds with each new generation: HBM4 pushes stack counts, heat, power delivery, signal integrity and integration with the base die all higher at once.

  • 22%: TrendForce's estimate of HBM's share of total DRAM wafer input across the three major memory makers by the end of 2026
  • 9%: estimated share of total DRAM bit supply that HBM will account for at the same point
  • 30%: projected HBM wafer-input share by the end of 2027, implying tougher capacity competition with commodity DRAM

Because a given wafer produces relatively fewer usable bits when it goes into HBM rather than standard DRAM, total DRAM bit supply doesn't grow as fast as the wafer numbers alone would suggest as HBM's share rises. That's an important link between AI demand and commodity DRAM pricing.

"HBM is just more profitable" isn't the whole story

HBM is a high-value, strategically important product. But the 2026 memory market has commodity DRAM pricing running hot too. TrendForce found that, as of the first quarter of 2026, HBM's revenue and profitability per wafer actually fell below that of DDR5 64GB RDIMM for a stretch.

That means Samsung's move isn't simply "drop cheap DDR5, make only expensive HBM." It looks more like a longer-term play: securing limited packaging resources now to lock in an HBM4 supplier position for future AI accelerator platforms.

HBM only turns into meaningful revenue after it clears customer qualification, no matter how much capacity exists. But once a product is qualified for a major GPU or AI ASIC platform, that relationship can carry through multiple product generations and supply agreements. That's why this reshuffling of back-end capacity matters more for next-generation customer relationships than for this quarter's margins.

A paradox that could support commodity DRAM prices

Here's an interesting wrinkle for investors. When a memory maker expands HBM output, HBM supply grows, but wafer and packaging resources available for DDR5 and standard server DRAM can shrink at the same time.

TrendForce tallied a 59.5% quarter-over-quarter jump in DRAM industry revenue in the second quarter of 2026, with supply expansion failing to keep pace with demand. It projects commodity DRAM contract prices will rise another 13% to 18% quarter over quarter in the third quarter. Consumer DRAM is expected to see even sharper price increases because of tighter supply.

So the simple framing, "AI lifts HBM prices while DDR5 stays weak," may not hold. If AI demand is soaking up production resources broadly and reducing the supply elasticity of commodity DRAM too, prices may not come down easily even if PC and smartphone demand stays soft.

Who gains, who bears the risk

AreaPossible upsideBurden or risk
Samsung ElectronicsExpanded HBM4 packaging capacity, stronger AI customer responsiveness, richer product mixQualification delays, weak yields, slow payback on large back-end investment
Commodity memoryLower supply elasticity could support DDR5 pricesHigher prices could further hurt PC and smartphone demand
OSAT and module partnersMore outsourced DDR5 module and SSD assembly and test volumeGreater dependence on the memory cycle and Samsung's order policy
AI GPU and ASIC makersExpanded HBM supply base could ease accelerator shipment bottlenecks over timeContinued HBM qualification and packaging bottlenecks could still cap system shipments
PC and smartphone makersOutsourcing expansion could help backfill finished-memory supplySustained high DRAM prices keep pressure on bill-of-materials costs
Samsung sent out assembly and test slots, not DRAM chips, and HBM is taking the space.

Insight Times Editorial Desk