AI ran out of memory before it ran out of GPUs

AI is rewriting the memory industry's oldest formula

Memory used to be the textbook cycle business. Sales rose, prices rose, everyone added capacity, the market flooded, prices fell, and production cuts started the loop again.

This time the starting point is different. Every accelerator carries HBM. Every server needs large-capacity DDR5. Training data and checkpoints need high-capacity SSDs. AI demand does not press on one chip. It presses on the entire data center system at once.

Samsung Electronics said as much in its second-quarter 2026 earnings call, forecasting stronger demand for server DRAM, eSSD and HBM in the second half, with supply constraints persisting despite efforts to expand output.

Why more HBM does not leave more ordinary DRAM

HBM stacks multiple DRAM dies, connects them with TSVs, and has to be packaged to sit close to a high-performance accelerator. Stacking, testing, yield, thermal management and customer qualification all have to line up.

According to a comparison published by TrendForce, at the same process node and capacity, an HBM die is roughly 35 to 45 percent larger than DDR5, yield including TSV packaging is roughly 20 to 30 percent lower, and the production cycle runs one and a half to two months longer.

So ramping HBM can, paradoxically, leave less room for commodity DRAM. The more that limited leading-edge DRAM capacity is allocated to higher-margin HBM and server products, the tighter DRAM for PCs and phones becomes.

DRAM and NAND may part ways in 2027

TrendForce estimates DRAM's supply sufficiency ratio at about minus 1 to minus 2 percent in 2026, and sees the gap widening in 2027. Even if new capacity partially comes online in 2027, the meaningful production contribution is more likely to land in 2028.

NAND looks different. A shift to higher layer counts and new capacity coming online could push bit supply growth sharply higher in 2027. If consumer electronics demand stays weak, supply and demand could loosen further from the second half of 2027.

A more accurate label than "memory supercycle," then, is "tight DRAM, comparatively looser NAND."

The shortage is not one fab

Leading-edge DRAM wafers, TSVs and stacking, advanced packaging, test and reliability verification, and customer certification all have to scale together. Block any single step and finished product shipments slip.

Samsung expects HBM revenue to more than triple year on year in 2026 and is expanding HBM4 capacity. But full operation of Line 5 at its Pyeongtaek second campus is set for 2028.

Micron began HBM4 volume shipments in March 2026, and said in June that HBM4 was shipping in volume to major customer platforms. It is preparing HBM4E mass production for 2027.

Who makes money at the bottleneck, and who pays

The most direct beneficiaries are the memory suppliers. As HBM and server DRAM take a larger share of the mix, Samsung Electronics, SK Hynix and Micron have room to improve average selling prices and product mix.

On the other side sit GPU makers, server builders and cloud operators. Nvidia and AMD can secure all the accelerator dies they want, but without HBM and packaging they cannot ship systems. Hyperscalers such as Microsoft, Amazon, Google and Meta have to absorb higher procurement costs.

Large buyers can lock in volume through multi-year contracts and prepayments. Smaller AI clouds and startups cannot get the same terms.

Why a consumer should care about the price of server-grade HBM

When memory makers give HBM and server DRAM first claim on limited capacity, the effects spread to the price and specification of PC RAM, mobile DRAM and SSDs.

Phone makers can delay raising base storage. PC vendors can charge more for high-capacity RAM options. Business customers pay indirectly through cloud and AI service pricing.

Consumers end up sharing the bill in a familiar form: more expensive devices, slower spec upgrades, and higher cloud costs.

Insight Times Editorial Desk